From 7dfb0172d1ea74cf85fb84ab2a5a0af46866c5b5 Mon Sep 17 00:00:00 2001 From: pingqiu Date: Thu, 30 Apr 2026 11:51:20 -0700 Subject: [PATCH] =?UTF-8?q?sw-block/design:=20mini-plan=20=C2=A711.7=20?= =?UTF-8?q?=E2=80=94=20pillar=202/3=20landed-SHA=20+=20test-name=20table?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Annotates pillar 2 (dual-line execution) and pillar 3 (receiver convergence) rows with the landed commits + concrete test names so the design narrative tracks the code: Pillar 2 — assembled-stack fault-injection 7d051e2 — C3 fault-injection (recovery-package layer, spy sink): TestC3FaultInjection_BaseError_WalExitsViaCtx TestC3FaultInjection_OuterCancel_BothLanesWindDown TestC3FaultInjection_WalError_RunTerminates_NarrowVariantA 9f62ebe — Pillar 2 fault-injection on the assembled stack (BlockExecutor + RecoverySink + Sender + WalShipper): TestPillar2A_BaseError_AssembledStack_FailReason TestPillar2B_LiveWrites_HighPressure_BarrierIntegrity TestPillar2C_WireAbortMidSession_AssembledStack_RestoresEmitContext Pillar 3 — receiver convergence under same-LBA conflict 291e652 — slice-1: same-LBA arbitration on transport stack 3495a12 — slice-1 polish (AchievedLSN assertion, replica==primary comparison, comment fixes, companion-SHA list) TestPillar3Slice1_ReceiverConvergence_LiveOverwritesBacklog_SameLBAs (transport-stack only; slice-2 lifts to engine path via dual_lane_engine_test.go) Co-Authored-By: Claude Opus 4.7 (1M context) --- sw-block/design/v3-recovery-wal-shipper-mini-plan.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sw-block/design/v3-recovery-wal-shipper-mini-plan.md b/sw-block/design/v3-recovery-wal-shipper-mini-plan.md index 9e8a75d45..283ef4a29 100644 --- a/sw-block/design/v3-recovery-wal-shipper-mini-plan.md +++ b/sw-block/design/v3-recovery-wal-shipper-mini-plan.md @@ -296,8 +296,8 @@ Choice — **per-connection format dispatch**, not single-format unification. Du | Pillar | Must prove | Tests (extend / add) | |--------|------------|---------------------| | **1 — WalShipper: backlog vs incoming** | **`ModeBacklog`**: timer + **`DrainBacklog`** / **`ScanLBAs`**, **`NotifyAppend`** lag-only; **`ModeRealtime`**: **`NotifyAppend`** tail + **`StrictRealtimeOrdering`**; **§13** carve-out | `core/transport`: **`TestC2_*`**, **`TestWalShipper_*`**, **`replicaid_unified_test`**; add **assembled-path** sessions (real **`RecoverySink`**, not shipper-only) | -| **2 — Dual-line execution** | **BASE ∥ WAL** overlap, **`writeMu`**-bounded interleave; correct **profile / port**; **no corrupted frames** | **`TestC3_BaseWalParallel_FramesInterleave`**, dual-lane E2E; **item (2)**: **C3 ctx fault-injection** | -| **3 — Receiver recover convergence** | Replica accepts **interleaved base + WAL** on recover path, **bitmap / `checkMonotonic`**, **barrier `achievedLSN`**, moves toward **idle / healthy** | **`core/recovery` E2E**, **`dual_lane_engine_test`**, **`replication/component` cluster**; stress: **live writes during session**; **T2** when §IV closed | +| **2 — Dual-line execution** | **BASE ∥ WAL** overlap, **`writeMu`**-bounded interleave; correct **profile / port**; **no corrupted frames** | **`TestC3_BaseWalParallel_FramesInterleave`**, dual-lane E2E; **item (2)**: **C3 ctx fault-injection** (**`7d051e2`** — `TestC3FaultInjection_BaseError_WalExitsViaCtx` / `_OuterCancel_BothLanesWindDown` / `_WalError_RunTerminates_NarrowVariantA`); assembled-stack lift (**`9f62ebe`** — `TestPillar2A_BaseError_AssembledStack_FailReason` / `TestPillar2B_LiveWrites_HighPressure_BarrierIntegrity` / `TestPillar2C_WireAbortMidSession_AssembledStack_RestoresEmitContext`) | +| **3 — Receiver recover convergence** | Replica accepts **interleaved base + WAL** on recover path, **bitmap / `checkMonotonic`**, **barrier `achievedLSN`**, moves toward **idle / healthy** | **`core/recovery` E2E**, **`dual_lane_engine_test`**, **`replication/component` cluster**; stress: **live writes during session**; **T2** when §IV closed. **Slice-1 landed 2026-04-30** (**`291e652`** + polish **`3495a12`**) — `TestPillar3Slice1_ReceiverConvergence_LiveOverwritesBacklog_SameLBAs` (transport-stack only; **slice-2** lifts to engine-driven path via `dual_lane_engine_test.go`) | **Order**: **(1)** Phase 0 **committed + §11.6 receipt (SHA)** → **(2)** fault-injection → **(3)** widen matrix → **hardware soak** (**T2 / T7**).