From 822c588d0863dbc23b9933871cf60a5e195c84f0 Mon Sep 17 00:00:00 2001 From: pingqiu Date: Thu, 30 Apr 2026 11:21:14 -0700 Subject: [PATCH] =?UTF-8?q?sw-block/design:=20mini-plan=20=C2=A711.6=20Pha?= =?UTF-8?q?se=200=20SHA=20receipt=20+=20=C2=A711.7=20heavy=20integration?= =?UTF-8?q?=20matrix?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit §11.6 startRebuildDualLane row updated with landed-2026-04-30 commit receipts on g7-redo/wal-shipper-impl: - e354813 fix(transport): unify replicaID in startRebuildDualLane - e5a8763 fix(test): align component cluster harness to replica-%d Module-wide go test green (25 packages). Phase 0 closed. §11.7 added — heavy integration proof matrix on the manager-assembled session (BlockExecutor + PrimaryBridge + RecoverySink + recovery.Sender + resident WalShipper + PeerShipCoordinator under unified replicaID). Three pillars: (1) WalShipper backlog/realtime modes, (2) dual-line execution + writeMu interleave, (3) receiver convergence. Order: Phase 0 + SHA receipt → C3 fault-injection → widen matrix → T2/T7 hardware soak. Stop rule: failure at assembled-session layer fixes algorithm/wiring before Phase 1 attempt binder. Revision rows v0.7 + v0.8 record the §11.6 + §11.7 deltas. Co-Authored-By: Claude Opus 4.7 (1M context) --- .../v3-recovery-wal-shipper-mini-plan.md | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/sw-block/design/v3-recovery-wal-shipper-mini-plan.md b/sw-block/design/v3-recovery-wal-shipper-mini-plan.md index 79de3c512..9e8a75d45 100644 --- a/sw-block/design/v3-recovery-wal-shipper-mini-plan.md +++ b/sw-block/design/v3-recovery-wal-shipper-mini-plan.md @@ -136,6 +136,8 @@ Wal-shipper-spec **§9** names coarse tests — here map **package + style**: | 2026-04-30 | v0.4 — **P2d ratified + implemented** (`cb8ff1c`): per-connection format dispatch (steady=`MsgShipEntry`, dual-lane=`frameWALEntry`); resident WalShipper with EmitProfile + EmitKind; RecoverySink wired into `startRebuildDualLane` | | 2026-04-30 | v0.5 — **§11 C1–C3 hardening sequence** appended after architect review of `cb8ff1c` exposed three correctness gaps vs §6.8 checklist (writer race, missing RecordShipped, no timer drain, sequential BASE/WAL) | | 2026-04-30 | v0.6 — **Dual-mode **`ModeBacklog`/ModeRealtime`** + consensus **`§13` E‑WALSHIPPER‑DUAL‑MODE** (**T4a carve-out**) — rewrote **§11.2**, **§11.3** `#3/#4/#9`, §11.4 anchors, §11.5 (**StrictRealtimeOrdering**, TOCTOU); **§11.6 migrations** (**replicaID**, rebuild-on-gap); CHK/timer scope = **Backlog** | +| 2026-04-30 | v0.7 — **§11.6** + **`v3-recovery-execution-institution.md`** **Entity layering & assembly contract** (**architect → SW**); Phase 0 **replicaID** vs Phase 1 **attempt binder** guardrails | +| 2026-04-30 | v0.8 — **§11.7** heavy integration proof (**manager-assembled session**): pillars **WalShipper / dual-line / receiver convergence**; ordering **Phase 0 → (2) fault-inject → matrix → soak** | --- @@ -283,6 +285,21 @@ Choice — **per-connection format dispatch**, not single-format unification. Du | **§IV T2 (`targetLSN` vs moving `head` / barrier)** | Architect-open at consensus **§IV**; hardware run validates **receiver `achievedLSN` ⇄ coordinator `targetLSN`** at C3 barrier. | | **§IV T7 (R2 sustained pressure)** | Single-shot **`OnSaturation`** is structural only; throttle / escalation remains **engine** work. | | **Engine rebuild-on-gap** (before `StrictRealtimeOrdering=true`) | If **Ship→WalShipper** sees Realtime **`NotifyAppend`** violations (out‑of‑order / **`lsn≠cursor+1`** under strict policy, or **`cursor cursor + 1` as sole debt test** — use **`cursor < head`** (**Backlog**); (**b**) **Realtime never substrate-scan for ship** (**T4a**, **§13**). | +### §11.7 Heavy integration proof — **after Phase 0 + item (2)** (**architect intent**) + +**Goal**: Before **Phase 1 `RebuildAttemptBindings`**, expand tests on the **already-assembled session**: adapter/engine issues the recover command; **`BlockExecutor` + `PrimaryBridge` + `RecoverySink` + `recovery.Sender`** execute it; **resident `WalShipper`** owns WAL scheduling; **`PeerShipCoordinator`** keys pin / ship cursor under **unified `replicaID` (Phase 0)**. Proves **“高层 manager 组装的 session”** can finish **without** a new entity type. + +| Pillar | Must prove | Tests (extend / add) | +|--------|------------|---------------------| +| **1 — WalShipper: backlog vs incoming** | **`ModeBacklog`**: timer + **`DrainBacklog`** / **`ScanLBAs`**, **`NotifyAppend`** lag-only; **`ModeRealtime`**: **`NotifyAppend`** tail + **`StrictRealtimeOrdering`**; **§13** carve-out | `core/transport`: **`TestC2_*`**, **`TestWalShipper_*`**, **`replicaid_unified_test`**; add **assembled-path** sessions (real **`RecoverySink`**, not shipper-only) | +| **2 — Dual-line execution** | **BASE ∥ WAL** overlap, **`writeMu`**-bounded interleave; correct **profile / port**; **no corrupted frames** | **`TestC3_BaseWalParallel_FramesInterleave`**, dual-lane E2E; **item (2)**: **C3 ctx fault-injection** | +| **3 — Receiver recover convergence** | Replica accepts **interleaved base + WAL** on recover path, **bitmap / `checkMonotonic`**, **barrier `achievedLSN`**, moves toward **idle / healthy** | **`core/recovery` E2E**, **`dual_lane_engine_test`**, **`replication/component` cluster**; stress: **live writes during session**; **T2** when §IV closed | + +**Order**: **(1)** Phase 0 **committed + §11.6 receipt (SHA)** → **(2)** fault-injection → **(3)** widen matrix → **hardware soak** (**T2 / T7**). + +**Stop rule**: Failure at **assembled-session** layer → fix **algorithm / wiring** before **Phase 1** (binder fixes **identity**, not WAL/base correctness). +